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Commit 71a1ba7d authored by Hachemin Pierre-Yves's avatar Hachemin Pierre-Yves

First UART RX

parent 8d6ff610
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity BoardController is
Port (
switches : in STD_LOGIC_VECTOR (7 downto 0);
Btn_gobo : in STD_LOGIC;
Btn_color : in STD_LOGIC;
Btn_shutter : in STD_LOGIC;
Btn_pan : in STD_LOGIC;
Btn_tilt : in STD_LOGIC;
clk : in STD_LOGIC;
LED : out STD_LOGIC_VECTOR(7 downto 0);
output : out STD_LOGIC
);
end BoardController;
architecture Behavioral of BoardController is
signal goboRot1 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal goboWheel1 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal color1 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal shutter1 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal pan1 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal tilt1 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal address : STD_LOGIC_VECTOR (8 downto 0):="000000001";
signal done : STD_LOGIC;
signal goboRot8 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal goboWheel4 : STD_LOGIC_VECTOR (3 downto 0):="0000";
signal color4 : STD_LOGIC_VECTOR (3 downto 0):="0000";
signal shutter8 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal pan8 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal tilt8 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal trig_goboRot : STD_LOGIC:='0';
signal trig_goboWheel : STD_LOGIC:='0';
signal trig_color : STD_LOGIC:='0';
signal trig_shutter : STD_LOGIC:='0';
signal trig_pan : STD_LOGIC:='0';
signal trig_tilt : STD_LOGIC:='0';
COMPONENT Int_GoboRot is
Port (
clk : in STD_LOGIC;
trig_goboRot : in STD_LOGIC;
goboRot8 : in STD_LOGIC_VECTOR (7 downto 0);
goboRot : out STD_LOGIC_VECTOR (7 downto 0));
END COMPONENT;
COMPONENT Int_GoboWheel is
Port (
clk : in STD_LOGIC;
trig_goboWheel : in STD_LOGIC;
goboWheel4 : in STD_LOGIC_VECTOR (3 downto 0);
goboWheel : out STD_LOGIC_VECTOR (7 downto 0));
END COMPONENT;
COMPONENT Int_Color is
Port (
clk : in STD_LOGIC;
trig_color : in STD_LOGIC;
color4 : in STD_LOGIC_VECTOR (3 downto 0);
color : out STD_LOGIC_VECTOR (7 downto 0));
END COMPONENT;
COMPONENT Int_Shutter is
Port (
clk : in STD_LOGIC;
trig_shutter : in STD_LOGIC;
shutter8 : in STD_LOGIC_VECTOR (7 downto 0);
shutter : out STD_LOGIC_VECTOR (7 downto 0));
END COMPONENT;
COMPONENT Int_Pan is
Port (
clk : in STD_LOGIC;
trig_pan : in STD_LOGIC;
pan8 : in STD_LOGIC_VECTOR (7 downto 0);
pan : out STD_LOGIC_VECTOR (7 downto 0));
END COMPONENT;
COMPONENT Int_Tilt is
Port (
clk : in STD_LOGIC;
trig_tilt : in STD_LOGIC;
tilt8 : in STD_LOGIC_VECTOR (7 downto 0);
tilt : out STD_LOGIC_VECTOR (7 downto 0));
END COMPONENT;
COMPONENT frameController
Port (
goboWheel : in STD_LOGIC_VECTOR (7 downto 0);
goboRot : in STD_LOGIC_VECTOR (7 downto 0);
color : in STD_LOGIC_VECTOR (7 downto 0);
shutter : in STD_LOGIC_VECTOR (7 downto 0);
pan : in STD_LOGIC_VECTOR (7 downto 0);
tilt : in STD_LOGIC_VECTOR (7 downto 0);
address : in STD_LOGIC_VECTOR (8 downto 0);
send : in STD_LOGIC;
clk : in STD_LOGIC;
tx : out STD_LOGIC;
done : out STD_LOGIC
);
END COMPONENT;
begin
LED <= switches;
GoboRot : Int_GoboRot PORT MAP(
clk => clk,
trig_goboRot => trig_goboRot,
goboRot8 => goboRot8,
goboRot => goboRot1
);
GobotWheel : Int_GoboWheel PORT MAP(
clk => clk,
trig_goboWheel => trig_goboWheel,
goboWheel4 => goboWheel4,
goboWheel => goboWheel1
);
Color : Int_Color PORT MAP(
clk => clk,
trig_color => trig_color,
color4 => color4,
color => color1
);
Shutter : Int_Shutter PORT MAP(
clk => clk,
trig_shutter => trig_shutter,
shutter8 => shutter8,
shutter => shutter1
);
Pan : Int_Pan PORT MAP(
clk => clk,
trig_pan => trig_pan,
pan8 => pan8,
pan => pan1
);
Tilt : Int_Tilt PORT MAP(
clk => clk,
trig_tilt => trig_tilt,
tilt8 => tilt8,
tilt => tilt1
);
FrameGenerator : frameController PORT MAP(
goboWheel => goboWheel1,
goboRot => goboRot1,
color => color1,
shutter => shutter1,
pan => pan1,
tilt => tilt1,
address => address,
send => '1',
clk => clk,
tx => output,
done => done
);
Stim : process(clk)
begin
if clk'event and clk='1' then
if Btn_gobo='1' then
goboRot8 <= switches;
trig_goboRot <= '1';
goboWheel4 <= switches (3 downto 0);
trig_goboWheel <= '1';
else if Btn_color='1' then
color4 <= switches (3 downto 0);
trig_color <= '1';
else if Btn_shutter='1' then
shutter8 <= switches;
trig_shutter <= '1';
else if Btn_pan='1' then
pan8 <= switches;
trig_pan <= '1';
else if Btn_tilt='1' then
tilt8 <= switches;
trig_tilt <= '1';
else
trig_goboRot <= '0';
trig_goboWheel <= '0';
trig_color <= '0';
trig_shutter <= '0';
trig_pan <= '0';
trig_tilt <= '0';
end if;
end if;
end process;
end architecture;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity BoardController is
Port (
switches : in STD_LOGIC_VECTOR (7 downto 0);
Btn_gobo : in STD_LOGIC;
Btn_color : in STD_LOGIC;
Btn_shutter : in STD_LOGIC;
Btn_pan : in STD_LOGIC;
Btn_tilt : in STD_LOGIC;
clk : in STD_LOGIC;
LED : out STD_LOGIC_VECTOR(7 downto 0);
output : out STD_LOGIC
);
end BoardController;
architecture Behavioral of BoardController is
signal goboRot1 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal goboWheel1 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal color1 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal shutter1 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal pan1 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal tilt1 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal address : STD_LOGIC_VECTOR (8 downto 0):="000000001";
signal done : STD_LOGIC;
signal goboRot8 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal goboWheel4 : STD_LOGIC_VECTOR (3 downto 0):="0000";
signal color4 : STD_LOGIC_VECTOR (3 downto 0):="0000";
signal shutter8 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal pan8 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal tilt8 : STD_LOGIC_VECTOR (7 downto 0):="00000000";
signal trig_goboRot : STD_LOGIC:='0';
signal trig_goboWheel : STD_LOGIC:='0';
signal trig_color : STD_LOGIC:='0';
signal trig_shutter : STD_LOGIC:='0';
signal trig_pan : STD_LOGIC:='0';
signal trig_tilt : STD_LOGIC:='0';
COMPONENT Int_GoboRot is
Port (
clk : in STD_LOGIC;
trig_goboRot : in STD_LOGIC;
goboRot8 : in STD_LOGIC_VECTOR (7 downto 0);
goboRot : out STD_LOGIC_VECTOR (7 downto 0));
END COMPONENT;
COMPONENT Int_GoboWheel is
Port (
clk : in STD_LOGIC;
trig_goboWheel : in STD_LOGIC;
goboWheel4 : in STD_LOGIC_VECTOR (3 downto 0);
goboWheel : out STD_LOGIC_VECTOR (7 downto 0));
END COMPONENT;
COMPONENT Int_Color is
Port (
clk : in STD_LOGIC;
trig_color : in STD_LOGIC;
color4 : in STD_LOGIC_VECTOR (3 downto 0);
color : out STD_LOGIC_VECTOR (7 downto 0));
END COMPONENT;
COMPONENT Int_Shutter is
Port (
clk : in STD_LOGIC;
trig_shutter : in STD_LOGIC;
shutter8 : in STD_LOGIC_VECTOR (7 downto 0);
shutter : out STD_LOGIC_VECTOR (7 downto 0));
END COMPONENT;
COMPONENT Int_Pan is
Port (
clk : in STD_LOGIC;
trig_pan : in STD_LOGIC;
pan8 : in STD_LOGIC_VECTOR (7 downto 0);
pan : out STD_LOGIC_VECTOR (7 downto 0));
END COMPONENT;
COMPONENT Int_Tilt is
Port (
clk : in STD_LOGIC;
trig_tilt : in STD_LOGIC;
tilt8 : in STD_LOGIC_VECTOR (7 downto 0);
tilt : out STD_LOGIC_VECTOR (7 downto 0));
END COMPONENT;
COMPONENT frameController
Port (
goboWheel : in STD_LOGIC_VECTOR (7 downto 0);
goboRot : in STD_LOGIC_VECTOR (7 downto 0);
color : in STD_LOGIC_VECTOR (7 downto 0);
shutter : in STD_LOGIC_VECTOR (7 downto 0);
pan : in STD_LOGIC_VECTOR (7 downto 0);
tilt : in STD_LOGIC_VECTOR (7 downto 0);
address : in STD_LOGIC_VECTOR (8 downto 0);
send : in STD_LOGIC;
clk : in STD_LOGIC;
tx : out STD_LOGIC;
done : out STD_LOGIC
);
END COMPONENT;
begin
LED <= switches;
GoboRot : Int_GoboRot PORT MAP(
clk => clk,
trig_goboRot => trig_goboRot,
goboRot8 => goboRot8,
goboRot => goboRot1
);
GobotWheel : Int_GoboWheel PORT MAP(
clk => clk,
trig_goboWheel => trig_goboWheel,
goboWheel4 => goboWheel4,
goboWheel => goboWheel1
);
Color : Int_Color PORT MAP(
clk => clk,
trig_color => trig_color,
color4 => color4,
color => color1
);
Shutter : Int_Shutter PORT MAP(
clk => clk,
trig_shutter => trig_shutter,
shutter8 => shutter8,
shutter => shutter1
);
Pan : Int_Pan PORT MAP(
clk => clk,
trig_pan => trig_pan,
pan8 => pan8,
pan => pan1
);
Tilt : Int_Tilt PORT MAP(
clk => clk,
trig_tilt => trig_tilt,
tilt8 => tilt8,
tilt => tilt1
);
FrameGenerator : frameController PORT MAP(
goboWheel => goboWheel1,
goboRot => goboRot1,
color => color1,
shutter => shutter1,
pan => pan1,
tilt => tilt1,
address => address,
send => '1',
clk => clk,
tx => output,
done => done
);
Stim : process(clk)
begin
if clk'event and clk='1' then
if Btn_gobo='1' then
goboRot8 <= switches;
trig_goboRot <= '1';
goboWheel4 <= switches (3 downto 0);
trig_goboWheel <= '1';
else if Btn_color='1' then
color4 <= switches (3 downto 0);
trig_color <= '1';
else if Btn_shutter='1' then
shutter8 <= switches;
trig_shutter <= '1';
else if Btn_pan='1' then
pan8 <= switches;
trig_pan <= '1';
else if Btn_tilt='1' then
tilt8 <= switches;
trig_tilt <= '1';
else
trig_goboRot <= '0';
trig_goboWheel <= '0';
trig_color <= '0';
trig_shutter <= '0';
trig_pan <= '0';
trig_tilt <= '0';
end if;
end if;
end process;
end architecture;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity GlobalComponent is
Port ( Clk : in STD_LOGIC;
Tx : out STD_LOGIC;
Rx : in STD_LOGIC;
BTND : in STD_LOGIC;
RxInt : out STD_LOGIC;
done : out STD_LOGIC;
LEDS : out STD_LOGIC_VECTOR (7 downto 0);
SWITCH : in STD_LOGIC_VECTOR (7 downto 0));
end GlobalComponent;
architecture Behavioral of GlobalComponent is
component UART
Port(
Send : in STD_LOGIC;
DataIn : in STD_LOGIC_VECTOR(7 downto 0);
DataOut : out STD_LOGIC_VECTOR(7 downto 0);
RxInt : out STD_LOGIC;
Rx : in STD_LOGIC;
Tx : out STD_LOGIC;
Done : out STD_LOGIC;
Clk : in STD_LOGIC);
end component;
signal RxSig : STD_LOGIC := '1';
signal TxSig : STD_LOGIC := '1';
signal RxIntS : STD_LOGIC := '1';
signal DataReg : STD_LOGIC_VECTOR(7 downto 0);
begin
RxSig <= Rx ;
Tx <= TxSig ;
RxInt <= RxIntS;
LEDS <= DataReg WHEN (RxIntS = '1') ELSE DataReg;
UART1 : UART PORT MAP(
Clk => Clk,
Send => BTND,
DataIn => SWITCH,
DataOut => DataReg,
RxInt => RxIntS,
Done => done,
Tx => TxSig,
Rx => RxSig
);
end Behavioral;
\ No newline at end of file
......@@ -15,7 +15,7 @@ begin
address <=mem_address;
memory : process(trig_address)
begin
If clk'event and trig_address='1' then
If clk'event and clk='1' and trig_address='1' then
mem_address <= address9;
end if;
end process;
......
......@@ -15,7 +15,7 @@ begin
color <=mem_color;
memory : process(trig_color)
begin
If clk'event and trig_color='1' then
If clk'event and clk='1' and trig_color='1' then
CASE color4 IS
WHEN "0000" =>
mem_color <= "00001111"; --15 white
......
......@@ -15,7 +15,7 @@ begin
goboRot <=mem_goboRot;
memory : process(mem_goboRot)
begin
If clk'event and trig_goboRot='1' then
If clk'event and clk='1' and trig_goboRot='1' then
mem_goboRot <=goboRot8;
end if;
end process;
......
......@@ -15,7 +15,7 @@ begin
goboWheel <=mem_goboWheel;
memory : process(trig_goboWheel)
begin
If clk'event and trig_goboWheel='1' then
If clk'event and clk='1' and trig_goboWheel='1' then
CASE goboWheel4 IS
WHEN "0000" =>
mem_goboWheel <= "00100000"; --32 open
......
......@@ -15,7 +15,7 @@ begin
pan <=mem_pan;
memory : process(trig_pan)
begin
If clk'event and trig_pan='1' then
If clk'event and clk='1' and trig_pan='1' then
mem_pan <= pan8;
end if;
end process;
......
......@@ -15,7 +15,7 @@ begin
shutter <=mem_shutter;
memory : process(trig_shutter)
begin
If clk'event and trig_shutter='1' then
If clk'event and clk='1' and trig_shutter='1' then
mem_shutter <= shutter8;
end if;
end process;
......
......@@ -15,7 +15,7 @@ begin
tilt <=mem_tilt;
memory : process(trig_tilt)
begin
If clk'event and trig_tilt='1' then
If clk'event and clk='1' and trig_tilt='1' then
mem_tilt <= tilt8;
end if;
end process;
......
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity RxFsm is
Port(Clk : in STD_LOGIC;
BdClk : in STD_LOGIC;
Data : out STD_LOGIC_VECTOR(7 downto 0);
Done : out STD_LOGIC;
BdClkEn : out STD_LOGIC;
ClkMod : out INTEGER range 0 to 3;
Rx : in STD_LOGIC
);
end RxFsm;
architecture Behavioral of RxFsm is
TYPE STATE_TYPE IS (Idle, Start, R0, R1, R2, R3, R4, R5, R6, R7, Stop, V, I);
signal state : STATE_TYPE;
signal RxClked : STD_LOGIC;
begin
FSMTransition : process(Clk)
begin
if Clk'event and Clk = '1' then
CASE state IS
WHEN Idle =>
if Rx = '0' then
state <= Start;
else
state <= Idle;
end if;
WHEN Start =>
if BdClk = '1' then
state <= R0;
else
state <= Start;
end if;
WHEN R0 =>
if BdClk = '1' then
state <= R1;
else
state <= R0;
end if;
WHEN R1 =>
if BdClk = '1' then
state <= R2;
else
state <= R1;
end if;
WHEN R2 =>
if BdClk = '1' then
state <= R3;
else
state <= R2;
end if;
WHEN R3 =>
if BdClk = '1' then
state <= R4;
else
state <= R3;
end if;
WHEN R4 =>
if BdClk = '1' then
state <= R5;
else
state <= R4;
end if;
WHEN R5 =>
if BdClk = '1' then
state <= R6;
else
state <= R5;
end if;
WHEN R6 =>
if BdClk = '1' then
state <= R7;
else
state <= R6;
end if;
WHEN R7 =>
if BdClk = '1' then
state <= Stop;
else
state <= R7;
end if;
WHEN Stop =>
if Rx = '0' then
state <= I;
else
state <= V;
end if;
WHEN I =>
state <= Idle;
WHEN V =>
state <= Idle;
END CASE;
end if;
end process;
FSMValue : process(Clk)
begin
If Clk'event and Clk = '1' then
CASE state IS
WHEN Idle => Done <= '1';
BdClkEn <= '0';
ClkMod <= 0;
WHEN Start => Done <= '0';
BdClkEn <= '1';
ClkMod <= 3;
WHEN R0 => Data(7) <= RxClked;
Done <= '0';
BdClkEn <= '1';
ClkMod <= 2;
WHEN R1 => Data(6) <= RxClked;
Done <= '0';
BdClkEn <= '1';
ClkMod <= 2;
WHEN R2 => Data(5) <= RxClked;
Done <= '0';
BdClkEn <= '1';
ClkMod <= 2;
WHEN R3 => Data(4) <= RxClked;
Done <= '0';
BdClkEn <= '1';
ClkMod <= 2;
WHEN R4 => Data(3) <= RxClked;
Done <= '0';
BdClkEn <= '1';
ClkMod <= 2;
WHEN R5 => Data(2) <= RxClked;
Done <= '0';
BdClkEn <= '1';
ClkMod <= 2;
WHEN R6 => Data(1) <= RxClked;
Done <= '0';
BdClkEn <= '1';
ClkMod <= 2;
WHEN R7 => Data(0) <= RxClked;
Done <= '0';
BdClkEn <= '1';
ClkMod <= 2;
WHEN Stop => Done <= '0';
BdClkEn <= '1';
ClkMod <= 1;
WHEN V => Done <= '1';
BdClkEn <= '0';
ClkMod <= 0;
WHEN I => Done <= '0';
BdClkEn <= '0';
ClkMod <= 0;
END CASE;
end if;
end process;
EchantillonneRx : process(Clk)
begin
if Clk'event and Clk = '1' then
if BdClk = '1' then
RxClked <= Rx;
else RxClked <= RxClked;
end if;
end if;
end process;
end Behavioral;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity RxOverlayer is
Port ( DataIn : in STD_LOGIC_VECTOR (7 downto 0);
DataRdy : in STD_LOGIC;
Clk : in STD_LOGIC;
Trigger : out STD_LOGIC_VECTOR (7 downto 0);
DataOut :out STD_LOGIC_VECTOR (7 downto 0);
DoneRx : out STD_LOGIC);
end RxOverlayer;
architecture Behavioral of RxOverlayer is
TYPE STATE_TYPE IS (Idle, Start0, Start1, WaitTrigger, WaitData);
signal state : STATE_TYPE;
signal Data : STD_LOGIC_VECTOR (7 downto 0);
begin
FSMTransition : process(Clk)
begin
if Clk'event and Clk = '1' then
CASE state IS
WHEN Idle =>
if DataRdy = '1' then
state <= Start0;
else
state <= Idle;
end if;
WHEN Start0 =>
if DataRdy ='1' and Data = "00000000" then
state <= Start1;
else
state <= Start0;
end if;
WHEN Start1 =>
if DataRdy ='1' and Data = "00000000"then
state <= WaitTrigger;
else
state <= Start1;
end if;